# Silicore EDA Lab

> Silicore EDA Lab, by Broadmate Global, is an online lab for Verilog, SystemVerilog and UVM: write a design and a testbench in the browser, compile and simulate them on open-source engines, and read the waveform and the coverage the simulator produced. Other websites can use the same engine through a REST API, a JavaScript SDK or an embeddable editor.

Site: https://silicore.broadmate.org — free account, daily run limits.

## Engines
- Verilator 5.054 (default simulator; also lint-only compile and coverage)
- Icarus Verilog 12.0 (Verilog and partial SystemVerilog, `-g2012`; no UVM, no coverage)
- Verible v0.0-4298 (lint and format)
- Accellera uvm-core 2020.3.1 (UVM 1800.2), compiled with Verilator, built with `UVM_NO_DPI`

## What it does
- Multi-file projects: packages, `include` directories, automatic or manual compile order, zip import/export
- UVM: tests selected with `+UVM_TESTNAME`, verbosity and seed plusargs; PASS/FAIL from the UVM report summary
- Waveforms: VCD viewer in the page (hierarchy, zoom, cursor, edge stepping); VCD and FST downloads
- Coverage straight from Verilator's coverage.dat: line, branch, toggle, expression, FSM state, covergroups, cover properties; code and functional coverage reported separately
- Errors and warnings with file, line and column
- Accounts with email confirmation, private projects, run history, light and dark themes

## For developers
- REST API with asynchronous jobs (queued, running, completed, failed, timeout, cancelled): https://silicore.broadmate.org/api/docs (OpenAPI: /api/v1/openapi.json)
- Developer guide (API, embedding, SDK): https://silicore.broadmate.org/developers
- Server-to-server API keys; short-lived browser tokens; origin allowlist and strict CORS
- Embeddable editor in an iframe with signed per-session tokens and per-origin frame-ancestors; postMessage bridge
- JavaScript SDK: https://silicore.broadmate.org/sdk/v1/eda.js (MIT)

## Limits
- Not compatible with, and not a replacement for, Questa, ModelSim, VCS or Xcelium
- Verilator is 2-state (X and Z become 0/1); use Icarus for X-propagation questions
- UVM builds take about 45–60 s because the whole library is compiled to C++
- No VHDL, SystemC, mixed-language, analog, or user C/C++ (DPI-C) files
- Per run: compile 120 s (UVM 420 s), simulation 60 s (UVM 120 s), 64 files, 2 MB of source, 64 MB of waveform

## Contact
Broadmate Global — support@broadmate.org